Seminaires Techniques


Plateforme conception organizes technical seminars.

  • Those seminars will take place once a month and will cover various technical topics around embedded systems, hardware, wireless and security.
  • Those seminars are mainly aimed at providing useful technical information to engineers and researchers in microelectronics, and facilit networking

To make it possible to most to attend, the seminars will take place at lunch time from 12 to 13:30, sandwiches will be provided.

A public Google calendar will be updated when dates and talks are confirmed:

04/05/2017
  • [CANCELED] KEYSIGHT software flow on plateforme Conception CIM PACA

    Keysight and PF-Conception invite you in 3 sessions to discover :

    10:00am : RFIC Flow within Cadence Virtuoso including non-linear circuit-simulations (HB, Envelop, Transient) with GoldenGate and 3D Planar EM simulations with Momentum

    11:00am : How to address Packaging issues within ADS

    1:30pm : Solutions within ADS such as PIPro and SIPro + CILD launched early 2016 for people having some trouble in designing PCB

    More information and registration here:
    https://goo.gl/5AVm1j

    04/05/2017 @ 10:00 - 15:30

    Campus SophiaTech – Bâtiment Forum, 930 Route des Colles, 06410 Biot, France

    Click here for get the Evenbrite link and add the event in your digital calendar

18/05/2017
  • [SL3J] Overview of Power Management Integrated Circuit technologies and applications in portable electronics

    Overview of Power Management Integrated Circuit technologies and applications in portable electronics

    This conference is outlined as follows :
    A quick overview of electronic component technologies employed in a smartphone
    Power management needs (processor, display, RF, etc.)
    Review of the Power Management techniques and PMIC resources
    Compromise for Power Management ICs ( Efficiency / Cost / Size )
    DCDC performances and Loop characteristics
    Other Power Management resources (battery charging, Energy Harvesting …)
    Conclusion

    More information and registration here:
    https://goo.gl/3mNl1x

    18/05/2017 @ 14:00 - 15:00

    Campus SophiaTech – Bâtiment Forum, 930 Route des Colles, 06410 Biot, France

    Click here for get the Evenbrite link and add the event in your digital calendar

15/06/2017
  • [SYNOPSYS] Using Custom Compiler's Visually-Assisted Automation for Analog Layout

    Synopsys Custom Compiler* is a modern Analog Design environment allowing you to drastically reduce your schematic and layout effort.

    In this session, we will demonstrate how Custom Compiler's visually-assisted automation has transformed analog layout methodology. This presentation will show you how Custom Compiler's assisted placement, assisted routing, and template-based design reuse capabilities can reduce layout tasks from days to hours.

    *Custom Compiler reads and writes Open Access Database, enabling designers moving from historical solution to a modern one.
    https://www.synopsys.com/implementation-and-signoff/custom-implementation/custom-compiler.html

    More information and registration here:
    https://goo.gl/RntK4X

    15/06/2017 @ 12:00 - 13:30

    Campus SophiaTech – Bâtiment Forum, 930 Route des Colles, 06410 Biot, France

    Click here for get the Evenbrite link and add the event in your digital calendar


If you’re interested to submit a technical seminary please use this Request Form link. We will answer you after studying your application

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